Clock and data recovery circuits may be used in various settings. For example, a clock and data recovery circuit may be used for communicating between integrated circuits, in an optical network, and in other circumstances. Typically, a clock and data recovery circuit may be used to recover a clock from a data stream sent between the integrated circuits or over the optical network. The clock and data recovery circuit may also be used to re-time the data in the data stream to the recovered clock.
Due to increased data speeds in modern technologies, designs of clock and data recovery circuits have become increasingly complex, require additional circuitry, and have complex timing requirements. Additionally, due to increased data speed requirements and increased complexity, clock and data recovery circuits may account for a large portion of a power consumption of an integrated circuit that contains the clock and data recovery circuits. Additionally, each clock and data recovery circuit may occupy a relatively large portion of a footprint of an integrated circuit that contains the clock and data recovery circuit.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one example technology area where some embodiments described herein may be practiced.